arm-crypto-lib/bmw/f0_small_autogen.i

208 lines
3.9 KiB
OpenEdge ABL

/*=== W[ 0] ===*/
ldr r14, T05_ADDR
ldr r12, T07_ADDR
ldr r11, T10_ADDR
ldr r10, T13_ADDR
ldr r9, T14_ADDR
sub r3, r9, r12
/*(-- should do +10, +13, +1tr, +5 --)*/
add r5, r11, r10
add r5, r3
add r5, r14
S32_0 r8 r5
ldr r5, [r1, #1*4]
add r8, r5
str r8, [r0, #0*4]
/*=== W[ 3] ===*/
ldr r14, T00_ADDR
ldr r9, T01_ADDR
ldr r8, T08_ADDR
ldr r7, T10_ADDR
ldr r6, T13_ADDR
add r2, r9, r11
/*(-- should do +0, +13, +8, -2tr --)*/
add r5, r14, r10
add r5, r8
sub r5, r2
S32_3 r9 r5
ldr r5, [r1, #4*4]
add r9, r5
str r9, [r0, #3*4]
/*=== W[ 6] ===*/
ldr r12, T00_ADDR
ldr r11, T03_ADDR
ldr r9, T04_ADDR
ldr r8, T11_ADDR
ldr r7, T13_ADDR
/*(-- should do +13, +4, -0, -11, -3 --)*/
add r5, r10, r9
sub r5, r14
sub r5, r8
sub r5, r11
S32_1 r8 r5
ldr r5, [r1, #7*4]
add r8, r5
str r8, [r0, #6*4]
/*=== W[ 9] ===*/
ldr r10, T00_ADDR
ldr r9, T03_ADDR
ldr r8, T06_ADDR
sub r4, r8, r11
/*(-- should do +0, +0tr, +1tr --)*/
add r5, r14, r4
add r5, r3
S32_4 r5
ldr r11, [r1, #10*4]
add r5, r11
str r5, [r0, #9*4]
/*=== W[12] ===*/
ldr r11, T09_ADDR
/*(-- should do +2tr, -0tr, -9 --)*/
sub r5, r2, r4
sub r5, r11
S32_2 r7 r5
ldr r5, [r1, #13*4]
add r7, r5
str r7, [r0, #12*4]
/*=== W[15] ===*/
ldr r14, T04_ADDR
ldr r12, T06_ADDR
ldr r10, T09_ADDR
ldr r9, T12_ADDR
ldr r7, T13_ADDR
sub r4, r9, r11
sub r3, r7, r12
/*(-- should do +0tr, +1tr, -4 --)*/
add r5, r4, r3
sub r5, r14
S32_0 r7 r5
ldr r5, [r1, #0*4]
add r7, r5
str r7, [r0, #15*4]
/*=== W[ 2] ===*/
ldr r14, T00_ADDR
ldr r7, T07_ADDR
ldr r6, T15_ADDR
/*(-- should do +0, +15, +7, -0tr --)*/
add r5, r14, r6
add r5, r7
sub r5, r4
S32_2 r7 r5
ldr r5, [r1, #3*4]
add r7, r5
str r7, [r0, #2*4]
/*=== W[ 5] ===*/
ldr r14, T02_ADDR
ldr r12, T03_ADDR
ldr r11, T10_ADDR
ldr r8, T12_ADDR
ldr r7, T15_ADDR
sub r4, r7, r14
sub r2, r12, r9
/*(-- should do +0tr, +10, +2tr --)*/
add r5, r4, r11
add r5, r2
S32_0 r12 r5
ldr r5, [r1, #6*4]
add r12, r5
str r12, [r0, #5*4]
/*=== W[ 8] ===*/
ldr r12, T05_ADDR
/*(-- should do +1tr, -0tr, -5 --)*/
sub r5, r3, r4
sub r5, r12
S32_3 r11 r5
ldr r5, [r1, #9*4]
add r11, r5
str r11, [r0, #8*4]
/*=== W[11] ===*/
ldr r11, T00_ADDR
ldr r9, T02_ADDR
ldr r8, T05_ADDR
ldr r7, T08_ADDR
ldr r6, T09_ADDR
sub r4, r7, r12
/*(-- should do +0tr, +9, -0, -2 --)*/
add r5, r4, r10
sub r5, r11
sub r5, r14
S32_1 r11 r5
ldr r5, [r1, #12*4]
add r11, r5
str r11, [r0, #11*4]
/*=== W[14] ===*/
ldr r11, T11_ADDR
/*(-- should do +0tr, +2tr, -11 --)*/
add r5, r4, r2
sub r5, r11
S32_4 r5
ldr r7, [r1, #15*4]
add r5, r7
str r5, [r0, #14*4]
/*=== W[ 1] ===*/
ldr r14, T06_ADDR
ldr r12, T08_ADDR
ldr r10, T11_ADDR
ldr r8, T14_ADDR
ldr r7, T15_ADDR
add r4, r11, r8
add r3, r12, r7
/*(-- should do +0tr, +6, -1tr --)*/
add r5, r4, r14
sub r5, r3
S32_1 r14 r5
ldr r5, [r1, #2*4]
add r14, r5
str r14, [r0, #1*4]
/*=== W[ 4] ===*/
ldr r14, T01_ADDR
ldr r12, T02_ADDR
ldr r7, T09_ADDR
/*(-- should do +1, +2, +9, -0tr --)*/
add r5, r14, r12
add r5, r7
sub r5, r4
S32_4 r5
ldr r8, [r1, #5*4]
add r5, r8
str r5, [r0, #4*4]
/*=== W[ 7] ===*/
ldr r12, T01_ADDR
ldr r11, T04_ADDR
ldr r8, T05_ADDR
ldr r7, T12_ADDR
ldr r6, T14_ADDR
/*(-- should do +1, -12, -14, -4, -5 --)*/
sub r5, r14, r7
sub r5, r6
sub r5, r11
sub r5, r8
S32_2 r14 r5
ldr r5, [r1, #8*4]
add r14, r5
str r14, [r0, #7*4]
/*=== W[10] ===*/
ldr r14, T01_ADDR
ldr r8, T04_ADDR
ldr r7, T07_ADDR
add r4, r11, r7
/*(-- should do +1tr, -0tr, -1 --)*/
sub r5, r3, r4
sub r5, r14
S32_0 r14 r5
ldr r5, [r1, #11*4]
add r14, r5
str r14, [r0, #10*4]
/*=== W[13] ===*/
ldr r14, T02_ADDR
ldr r12, T10_ADDR
ldr r11, T11_ADDR
/*(-- should do +0tr, +10, +11, +2 --)*/
add r5, r4, r12
add r5, r11
add r5, r14
S32_3 r14 r5
ldr r5, [r1, #14*4]
add r14, r5
str r14, [r0, #13*4]