191 lines
6.9 KiB
C
191 lines
6.9 KiB
C
/* uart_lowlevel.c */
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/*
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This file is part of the ARM-Crypto-Lib.
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Copyright (C) 2010 Daniel Otte (daniel.otte@rub.de)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdint.h>
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#include "hw_regs.h"
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#include "hw_uart_regs.h"
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#include "uart_defines.h"
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#include "sysclock.h"
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void calc_baud_values(uint32_t baudrate, uint16_t* intdivider, uint8_t* fracdivider, uint8_t* highspeed){
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uint32_t tmp;
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uint32_t uart_freq;
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if(baudrate==0){
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return;
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}
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uart_freq = sysclk_get_freq();
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*highspeed = ((baudrate*16L)>uart_freq)?1:0;
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// tmp = (((uint64_t)UART_FREQ)*128LL)/(((*highspeed)?8L:16L)*baudrate);
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tmp = uart_freq<<((*highspeed)?(7-3):(7-4));
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tmp /= baudrate;
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tmp++;
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tmp>>=1;
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*fracdivider = (uint8_t)(tmp&0x3f);
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*intdivider = (uint16_t)(tmp>>6);
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}
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//*/
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static const
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uint32_t uart_base[] = { UART0_BASE, UART1_BASE, UART2_BASE };
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static const
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uint32_t gpio_base[] =
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{ GPIOA_BASE, GPIOB_BASE, GPIOC_BASE, GPIOD_BASE,
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GPIOE_BASE, GPIOF_BASE, GPIOG_BASE, GPIOH_BASE,
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GPIOJ_BASE,
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};
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static const
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uint8_t uart_tx_gpio[] = { GPIOA, GPIOD, GPIOG };
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static const
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uint8_t uart_rx_gpio[] = { GPIOA, GPIOD, GPIOG };
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static const
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uint8_t uart_tx_pin[] = { 1, 1, 1 };
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static const
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uint8_t uart_rx_pin[] = { 0, 0, 0 };
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static const
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uint8_t uart_tx_pctl[] = {1, 5, 1};
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static const
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uint8_t uart_rx_pctl[] = {1, 5, 1};
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uint8_t uart_init(uint8_t uartno, uint32_t baudrate, uint8_t databits, uint8_t paraty, uint8_t stopbits){
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uint32_t tmp;
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if(databits>=5){
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databits-=5;
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}
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if(uartno>UART_MAX){
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return UART_ERROR_WRONG_UART;
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}
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if(databits>UART_DATABITS_8){
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return UART_ERROR_WRONG_DATABITS;
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}
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if(paraty>UART_PARATY_SPACE){
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return UART_ERROR_WRONG_PARATY;
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}
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if(stopbits>UART_STOPBITS_TWO){
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return UART_ERROR_WRONG_STOPBITS;
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}
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/* enable clock for uart */
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HW_REG(SYSCTL_BASE+RCGC1_OFFSET) |= _BV(uartno);
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/* enable clock for gpio*/
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HW_REG(SYSCTL_BASE+RCGC2_OFFSET) |= _BV(uart_rx_gpio[uartno]) | _BV(uart_tx_gpio[uartno]);
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HW_REG(SYSCTL_BASE+RCGC2_OFFSET) |= 1;
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HW_REG(gpio_base[uart_rx_gpio[uartno]] + GPIO_ODR_OFFSET) &= ~_BV(uart_rx_pin[uartno]); /* open drain */
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HW_REG(gpio_base[uart_tx_gpio[uartno]] + GPIO_ODR_OFFSET) &= ~_BV(uart_tx_pin[uartno]); /* open drain */
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HW_REG(gpio_base[uart_rx_gpio[uartno]] + GPIO_PUR_OFFSET) &= ~_BV(uart_rx_pin[uartno]); /* pull-up */
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HW_REG(gpio_base[uart_tx_gpio[uartno]] + GPIO_PUR_OFFSET) &= ~_BV(uart_tx_pin[uartno]); /* pull-up */
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HW_REG(gpio_base[uart_rx_gpio[uartno]] + GPIO_PDR_OFFSET) &= ~_BV(uart_rx_pin[uartno]); /* pull-down*/
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HW_REG(gpio_base[uart_tx_gpio[uartno]] + GPIO_PDR_OFFSET) &= ~_BV(uart_tx_pin[uartno]); /* pull-down*/
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HW_REG(gpio_base[uart_rx_gpio[uartno]] + GPIO_DEN_OFFSET) |= _BV(uart_rx_pin[uartno]); /* digital enable */
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HW_REG(gpio_base[uart_tx_gpio[uartno]] + GPIO_DEN_OFFSET) |= _BV(uart_tx_pin[uartno]); /* digital enable */
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/* switch to alternate function for rx */
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HW_REG(gpio_base[uart_rx_gpio[uartno]]+GPIO_AFSEL_OFFSET) |= _BV(uart_rx_pin[uartno]);
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/* switch to alternate function for tx */
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HW_REG(gpio_base[uart_tx_gpio[uartno]]+GPIO_AFSEL_OFFSET) |= _BV(uart_tx_pin[uartno]);
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/* switch multiplexer to uart for rx */
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HW_REG(gpio_base[uart_rx_gpio[uartno]]+GPIO_PCTL_OFFSET) &= ~(0x0f<<(uart_rx_pin[uartno]*4));
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HW_REG(gpio_base[uart_rx_gpio[uartno]]+GPIO_PCTL_OFFSET) |= ((uart_rx_pctl[uartno])<<(uart_rx_pin[uartno]*4));
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/* switch multiplexer to uart for tx */
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HW_REG(gpio_base[uart_tx_gpio[uartno]]+GPIO_PCTL_OFFSET) &= ~(0x0f<<(uart_tx_pin[uartno]*4));
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HW_REG(gpio_base[uart_tx_gpio[uartno]]+GPIO_PCTL_OFFSET) |= ((uart_tx_pctl[uartno])<<(uart_tx_pin[uartno]*4));
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/* set pins to be 2mA */
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HW_REG(gpio_base[uart_rx_gpio[uartno]]+GPIO_DR2R_OFFSET) |= _BV(uart_rx_pin[uartno]);
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HW_REG(gpio_base[uart_tx_gpio[uartno]]+GPIO_DR2R_OFFSET) |= _BV(uart_tx_pin[uartno]);
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/* configure rx pin as input */
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HW_REG(gpio_base[uart_rx_gpio[uartno]]+GPIO_DIR_OFFSET) &= ~_BV(uart_rx_pin[uartno]);
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/* configure tx pin as output */
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HW_REG(gpio_base[uart_tx_gpio[uartno]]+GPIO_DIR_OFFSET) |= _BV(uart_tx_pin[uartno]);
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/* disable uart */
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HW_REG(uart_base[uartno]+UARTCTL_OFFSET) &= ~_BV(UART_UARTEN);
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/* set baudrate parameters */
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uint8_t highspeed;
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uint16_t ibrd;
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uint8_t fbrd;
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calc_baud_values(baudrate, &ibrd, &fbrd, &highspeed);
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tmp=HW_REG(uart_base[uartno]+UARTLCRH_OFFSET);
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HW16_REG(uart_base[uartno]+UARTIBRD_OFFSET) = ibrd;
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HW8_REG(uart_base[uartno]+UARTFBRD_OFFSET) = fbrd;
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HW_REG(uart_base[uartno]+UARTLCRH_OFFSET) = tmp;
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/* wait until uart is no longer busy */
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while(HW_REG(uart_base[uartno]+UARTFR_OFFSET)&_BV(UART_BUSY))
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;
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/* flush FIFOs */
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HW_REG(uart_base[uartno]+UARTLCRH_OFFSET) &= ~_BV(UART_FEN);
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/* set line parameters (bits, paraty, stopbits*/
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tmp = HW_REG(uart_base[uartno]+UARTLCRH_OFFSET);
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tmp &= ~0xff;
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tmp |= (paraty==UART_PARATY_MARK||paraty==UART_PARATY_SPACE)?_BV(7):0; /* set flag for mark or space paraty*/
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tmp |= databits<<5;
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tmp |= _BV(UART_FEN); /* enable FIFOs */
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tmp |= (stopbits==UART_STOPBITS_TWO)?_BV(3):0;
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tmp |= (paraty==UART_PARATY_EVEN || paraty==UART_PARATY_MARK)?_BV(2):0;
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tmp |= (paraty!=UART_PARATY_NONE)?_BV(1):0;
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HW_REG(uart_base[uartno]+UARTLCRH_OFFSET) = tmp;
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/* set the highspeed bit accordingly */
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if(highspeed){
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HW_REG(uart_base[uartno]+UARTCTL_OFFSET) |= _BV(UART_HSE);
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} else {
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HW_REG(uart_base[uartno]+UARTCTL_OFFSET) &= ~_BV(UART_HSE);
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}
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HW_REG(uart_base[uartno]+UARTFR_OFFSET) = 0;
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HW_REG(uart_base[uartno]+UARTCTL_OFFSET) |= _BV(UART_RXE) | _BV(UART_TXE);
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HW_REG(uart_base[uartno]+UARTCTL_OFFSET) |= _BV(UART_UARTEN);
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return UART_ERROR_OK;
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}
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void uart_putc(uint8_t uartno, uint8_t byte){
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if(uartno>UART_MAX){
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return;
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}
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/* wait while the FIFO is full */
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while(HW_REG(uart_base[uartno]+UARTFR_OFFSET)&_BV(UART_TXFF))
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;
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HW_REG(uart_base[uartno]+UARTDR_OFFSET) = (uint32_t)byte;
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}
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uint16_t uart_getc(uint8_t uartno){
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if(uartno>UART_MAX){
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return 0xffff;
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}
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/* wait while the FIFO is empty */
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while(HW_REG(uart_base[uartno]+UARTFR_OFFSET)&_BV(UART_RXFE))
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;
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return (uint16_t)HW_REG(uart_base[uartno]+UARTDR_OFFSET);
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}
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uint32_t uart_dataavail(uint8_t uartno){
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if(uartno>UART_MAX){
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return 0;
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}
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/* wait while the FIFO is empty */
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return(HW_REG(uart_base[uartno]+UARTFR_OFFSET)&_BV(UART_RXFE))?0:1;
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}
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void uart_flush(uint8_t uartno){
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if(uartno>UART_MAX){
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return;
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}
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while((HW_REG(uart_base[uartno]+UARTCTL_OFFSET)&_BV(UART_EOT)) == 0)
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;
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}
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