279 lines
6.0 KiB
ArmAsm
279 lines
6.0 KiB
ArmAsm
/* uart_ni.c */
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/*
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This file is part of the AVR-uart_ni.
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Copyright (C) 2006-2015 Daniel Otte (bg@nerilex.org)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "config.h"
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#include <avr/io.h>
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#include "avr-asm-macros.S"
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#include "uart_defs.h"
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/******************************************************************************/
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#if UART0_NI
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#ifndef UART0_PARATY
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# warning "UART0: using default paraty: 'none'"
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# define UART0_PARATY UART_PARATY_NONE
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#endif
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#ifndef UART0_STOPBITS
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# warning "UART0: using default ammount of stop bits: '1'"
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# define UART0_STOPBITS UART_STOPBITS_1
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#endif
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#ifndef UART0_DATABITS
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# warning "UART0: using default ammount of data bits: '8'"
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# define UART0_DATABITS UART_DATABITS_8
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#endif
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#ifdef UDR
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# define OLD_UART
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# ifdef UDR0
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# error "can not decide which registernames to use, UDR and UDR0 are defined"
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# endif
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#endif
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#ifdef OLD_UART
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# define UCSR0A UCSRA
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# define UCSR0B UCSRB
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# define UCSR0C UCSRC
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# define UBRR0H UBRRH
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# define UBRR0L UBRRL
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# define UDR0 UDR
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# define TXEN0 TXEN
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# define RXEN0 RXEN
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# define UDRE0 UDRE
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# define RXC0 RXC
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# define TXB80 TXB8
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# define RXB80 RXB8
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#endif
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#define BAUD (UART0_BAUD_RATE)
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#include "setbaud_asm.inc"
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/******************************************************************************/
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.global uart0_init
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uart0_init:
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ldi r24, UBRRH_VALUE
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STORE_IO UBRR0H, r24
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ldi r24, UBRRL_VALUE
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STORE_IO UBRR0L, r24
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#if _SFR_IO_REG_P(UCSR0A)
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#if USE_2X
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sbi _SFR_IO_ADDR(UCSR0A), 1
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#else
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cbi _SFR_IO_ADDR(UCSR0A), 1
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#endif
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#else
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lds r24, _SFR_MEM_ADDR(UCSR0A)
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#if USE_2X
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ori r24, 0x02
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#else
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andi r24, ~0x02
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#endif
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sts _SFR_MEM_ADDR(UCSR0A), r24
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#endif
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ldi r24, (UART0_PARATY<<4)|(UART0_STOPBITS<<3)|((UART0_DATABITS&3)<<1)
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STORE_IO UCSR0C, r24
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ldi r24, _BV(TXEN0)|_BV(RXEN0)|((UART0_DATABITS>>2)<<2)
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STORE_IO UCSR0B, r24
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ret
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/******************************************************************************/
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.global uart0_putc
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uart0_putc:
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#if _SFR_IO_REG_P(UCSR0A)
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sbis _SFR_IO_ADDR(UCSR0A), UDRE0
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rjmp uart0_putc
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#else
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lds r25, _SFR_MEM_ADDR(UCSR0A)
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sbrs r25, UDRE0
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rjmp uart0_putc
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#endif
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#if UART0_DATABITS == UART_DATABITS_9
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# if _SFR_IO_REG_P(UCSR0B)
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sbi UCSR0B, TXB80
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sbrs r25, 0
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cbi UCSR0B, TXB80
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# else
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lds r23, _SFR_MEM_ADDR(UCSR0B)
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bst r25, 0
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bld r23, TXB80
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sts _SFR_MEM_ADDR(UCSR0B), r23
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# endif
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#endif
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STORE_IO UDR0, r24
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ret
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/******************************************************************************/
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.global uart0_getc
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uart0_getc:
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#if _SFR_IO_REG_P(UCSR0A)
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sbis _SFR_IO_ADDR(UCSR0A), RXC0
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rjmp uart0_putc
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#else
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lds r25, _SFR_MEM_ADDR(UCSR0A)
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sbrs r25, RXC0
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rjmp uart0_getc
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#endif
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#if UART0_DATABITS == UART_DATABITS_9
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LOAD_IO r25, UCSR0B
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lsr r25
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andi r25, 1
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#else
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clr r25
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#endif
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LOAD_IO r24, UDR0
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ret
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/******************************************************************************/
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.global uart0_dataavail
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uart0_dataavail:
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LOAD_IO r24, UCSR0A
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andi r24, _BV(RXC0)
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clr r25
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ret
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#endif /* UART0_NI */
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/******************************************************************************/
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/******************************************************************************/
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/******************************************************************************/
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#if UART1_NI
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#ifndef UDRE1
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# error "registernames for second UART not defined"
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#endif
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#ifndef UART1_PARATY
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# warning "UART1: using default paraty: 'none'"
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# define UART1_PARATY UART_PARATY_NONE
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#endif
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#ifndef UART1_STOPBITS
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# warning "UART1: using default ammount of stop bits: '1'"
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# define UART1_STOPBITS UART_STOPBITS_1
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#endif
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#ifndef UART1_DATABITS
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# warning "UART1: using default ammount of data bits: '8'"
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# define UART1_DATABITS UART_DATABITS_8
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#endif
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#ifdef BAUD
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# undef BAUD
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#endif
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#define BAUD (UART1_BAUD_RATE)
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#include "setbaud_asm.inc"
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/******************************************************************************/
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.global uart1_init
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uart1_init:
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ldi r24, UBRRH_VALUE
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STORE_IO UBRR1H, r24
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ldi r24, UBRRL_VALUE
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STORE_IO UBRR1L, r24
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#if _SFR_IO_REG_P(UCSR1A)
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#if USE_2X
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sbi _SFR_IO_ADDR(UCSR1A), 1
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#else
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cbi _SFR_IO_ADDR(UCSR1A), 1
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#endif
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#else
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lds r24, _SFR_MEM_ADDR(UCSR1A)
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#if USE_2X
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ori r24, 0x02
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#else
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andi r24, ~0x02
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#endif
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sts _SFR_MEM_ADDR(UCSR1A), r24
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#endif
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ldi r24, (UART1_PARATY<<4)|(UART1_STOPBITS<<3)|((UART1_DATABITS&3)<<1)
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STORE_IO UCSR1C, r24
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ldi r24, _BV(TXEN1)|_BV(RXEN1)|((UART1_DATABITS>>2)<<2)
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STORE_IO UCSR1B, r24
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ret
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/******************************************************************************/
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.global uart1_putc
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uart1_putc:
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#if _SFR_IO_REG_P(UCSR1A)
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sbis _SFR_IO_ADDR(UCSR1A), UDRE1
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rjmp uart1_putc
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#else
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lds r23, _SFR_MEM_ADDR(UCSR1A)
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sbrs r23, UDRE1
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rjmp uart1_putc
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#endif
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#if UART1_DATABITS == UART_DATABITS_9
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# if _SFR_IO_REG_P(UCSR1B)
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sbi UCSR1B, TXB81
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sbrs r25, 0
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cbi UCSR1B, TXB81
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# else
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lds r23, _SFR_MEM_ADDR(UCSR1B)
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bst r25, 0
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bld r23, TXB81
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sts _SFR_MEM_ADDR(UCSR1B), r23
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# endif
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#endif
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STOREIO UDR1, r24
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ret
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/******************************************************************************/
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.global uart1_getc
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uart1_getc:
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#if _SFR_IO_REG_P(UCSR1A)
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sbis _SFR_IO_ADDR(UCSR1A), RXC1
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rjmp uart1_putc
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#else
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lds r25, _SFR_MEM_ADDR(UCSR1A)
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sbrs r25, RXC1
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rjmp uart1_getc
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#endif
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#if UART1_DATABITS == UART_DATABITS_9
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LOAD_IO r25, UCSR1B
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lsr r25
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andi r25, 1
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#else
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clr r25
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#endif
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LOAD_IO r24, UDR1
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ret
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/******************************************************************************/
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.global uart1_dataavail
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uart1_dataavail:
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LOAD_IO r24, UCSR1A
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andi r24, _BV(RXC1)
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clr r25
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ret
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#endif /* UART1_NI */
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