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avr-crypto-lib
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big bug fixed, still some problems with flow control

This commit is contained in:
bg 2009-07-30 02:12:55 +00:00
parent a5cb349f9d
commit 7701e318e4
6 changed files with 53 additions and 72 deletions
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15
WARNING-BUGGY-VERSION
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@ -1,15 +0,0 @@
The current version of the AVR-Crypto-Lib is BUGGY
====================================================
This is due to our afford of integrating newly optimized versions of the
UART interface and the cli tools.
We are working on this problem.
Please use a revision prior to 2009-07-28.
This means use
svn revisions up to revision 2832 and
bzr revisions up to revision 67
best regards,
Daniel Otte

23
config.h
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@ -28,16 +28,6 @@
#define DEBUG uart
/* uart.[ch] defines */
#define UART_INTERRUPT 1
#define UART_BAUD_RATE 38400
#define UART_RXBUFSIZE 64
#define UART_TXBUFSIZE 64
#define UART_LINE_BUFFER_SIZE 40
#define UART_XON_XOFF
#define UART_XON_XOFF_THRESHOLD_1 (UART_RXBUFSIZE - 24)
#define UART_XON_XOFF_THRESHOLD_2 (UART_RXBUFSIZE - 60)
#undef UART_LEDS
#define UART0_I 1
@ -47,19 +37,10 @@
#define UART0_DATABITS UART_DATABITS_8
#define UART0_RXBUFFER_SIZE 64
#define UART0_TXBUFFER_SIZE 64
#define UART0_SWFLOWCTRL 1
#define UART0_SWFLOWCTRL 0
#define UART0_THRESH_LOW 10
#define UART0_THRESH_HIGH 48
/*
#define UART_HWFLOWCONTROL
#define UART_RTS_PORT PORTA
#define UART_RTS_DDR DDRA
#define UART_CTS_PIN PINA
#define UART_CTS_DDR DDRA
#define UART_RTS_BIT 0
#define UART_CTS_BIT 1
*/
//#define TWISTER_MUL_TABLE
#define CLI_AUTO_HELP
#endif

2
test_src/circularbytebuffer-asm.S
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@ -229,6 +229,8 @@ circularbytebuffer_get_lifo:
* }
*
* param cb: r24:r25
* return: r24
* modifys: r22-r27,r30,r31
*/
.global circularbytebuffer_get_fifo
circularbytebuffer_get_fifo:

23
test_src/config.h
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@ -28,16 +28,6 @@
#define DEBUG uart
/* uart.[ch] defines */
#define UART_INTERRUPT 1
#define UART_BAUD_RATE 38400
#define UART_RXBUFSIZE 64
#define UART_TXBUFSIZE 64
#define UART_LINE_BUFFER_SIZE 40
#define UART_XON_XOFF
#define UART_XON_XOFF_THRESHOLD_1 (UART_RXBUFSIZE - 24)
#define UART_XON_XOFF_THRESHOLD_2 (UART_RXBUFSIZE - 60)
#undef UART_LEDS
#define UART0_I 1
@ -47,19 +37,10 @@
#define UART0_DATABITS UART_DATABITS_8
#define UART0_RXBUFFER_SIZE 64
#define UART0_TXBUFFER_SIZE 64
#define UART0_SWFLOWCTRL 1
#define UART0_SWFLOWCTRL 0
#define UART0_THRESH_LOW 10
#define UART0_THRESH_HIGH 48
/*
#define UART_HWFLOWCONTROL
#define UART_RTS_PORT PORTA
#define UART_RTS_DDR DDRA
#define UART_CTS_PIN PINA
#define UART_CTS_DDR DDRA
#define UART_RTS_BIT 0
#define UART_CTS_BIT 1
*/
//#define TWISTER_MUL_TABLE
#define CLI_AUTO_HELP
#endif

1
test_src/main-md5-test.c
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@ -144,6 +144,7 @@ int main (void){
cli_rx = (cli_rx_fpt)uart0_getc;
cli_tx = (cli_tx_fpt)uart0_putc;
testrun_md5();
for(;;){
cli_putstr_P(PSTR("\r\n\r\nCrypto-VS ("));
cli_putstr(algo_name);

61
test_src/uart_i-asm.S
View File

@ -71,6 +71,25 @@
# define RXC0 RXC
# define TXB80 TXB8
# define RXB80 RXB8
# define U2X0 U2X
# define UDRIE0 UDRIE
# define RXCIE0 RXCIE
#endif
#ifdef USART0_RX_vect
# define RX_ISR USART0_RX_vect
#endif
#ifdef USART_RXC_vect
# define RX_ISR USART_RXC_vect
#endif
#ifdef USART0_UDRE_vect
# define TX_ISR USART0_UDRE_vect
#endif
#ifdef USART_UDRE_vect
# define TX_ISR USART_UDRE_vect
#endif
#define CBB_SIZE 10
@ -156,7 +175,6 @@ uart0_init:
clr r25
ldi r22, lo8(uart0_ctx+UART0_CBB_RX_OFFSET)
ldi r23, hi8(uart0_ctx+UART0_CBB_RX_OFFSET)
ldi r24, UART0_RXBUFFER_SIZE
ldi r20, lo8(uart0_rxbuffer)
ldi r21, hi8(uart0_rxbuffer)
rcall circularbytebuffer_init2
@ -164,7 +182,6 @@ uart0_init:
clr r25
ldi r22, lo8(uart0_ctx+UART0_CBB_TX_OFFSET)
ldi r23, hi8(uart0_ctx+UART0_CBB_TX_OFFSET)
ldi r24, UART0_TXBUFFER_SIZE
ldi r20, lo8(uart0_txbuffer)
ldi r21, hi8(uart0_txbuffer)
rcall circularbytebuffer_init2
@ -183,7 +200,6 @@ uart0_init:
SET_BIT_IO UCSR0A, U2X0, r24
#else
CLEAR_BIT_IO UCSR0A, U2X0, r24
/* UCSR0A */
#endif
ldi r24, (UART0_PARATY<<4)|(UART0_STOPBITS<<3)|((UART0_DATABITS&3)<<1)
STORE_IO UCSR0C, r24
@ -210,11 +226,17 @@ uart0_init:
* }
*/
.global USART0_UDRE_vect
USART0_UDRE_vect:
push_range 21, 26
push_range 30, 31
.global TX_ISR
TX_ISR:
push r1
push r21
push r22
in r21, _SFR_IO_ADDR(SREG)
CLEAR_BIT_IO UCSR0B, UDRIE0, r22
sei
push_range 23, 27
push_range 30, 31
clr r1
ldi r24, lo8(uart0_ctx+UART0_CBB_TX_OFFSET)
ldi r25, hi8(uart0_ctx+UART0_CBB_TX_OFFSET)
rcall circularbytebuffer_get_fifo
@ -232,11 +254,14 @@ USART0_UDRE_vect:
breq 30b
#endif
STORE_IO UDR0, r24
SET_BIT_IO UCSR0B, UDRIE0, r22
99:
ori r21, 0x80 /* set I bit */
out _SFR_IO_ADDR(SREG), r21
pop_range 30, 31
pop_range 21, 26
reti
pop_range 21, 27
pop r1
ret
/******************************************************************************/
/*
@ -269,8 +294,13 @@ uart0_putc:
ldi r26, lo8(uart0_ctx+UART0_CBB_TX_OFFSET)
ldi r27, hi8(uart0_ctx+UART0_CBB_TX_OFFSET)
20:
; sei
movw r24, r26
; nop
; nop
cli
rcall circularbytebuffer_cnt
sei
cpi r24, UART0_TXBUFFER_SIZE
breq 20b
movw r22, r26
@ -326,11 +356,12 @@ uart0_putc:
* }
*
*/
.global USART0_RX_vect
USART0_RX_vect:
.global RX_ISR
RX_ISR:
push_range 0, 1
push_range 16, 31
in r18, _SFR_IO_ADDR(SREG)
in r16, _SFR_IO_ADDR(SREG)
clr r1
LOAD_IO r24, UDR0
#if UART0_SWFLOWCTRL
ldi r26, lo8(uart0_ctx+UART0_TXON_OFFSET)
@ -387,8 +418,8 @@ uart0_putc:
ldi r23, hi8(uart0_ctx+UART0_CBB_TX_OFFSET)
ldi r30, lo8(uart0_ctx+UART0_RXON_OFFSET)
ldi r31, hi8(uart0_ctx+UART0_RXON_OFFSET)
ld r16, Z
tst r16
ld r18, Z
tst r18
breq 60f
cpi r24, UART0_THRESH_HIGH+1
brlo 99f
@ -406,7 +437,7 @@ uart0_putc:
SET_BIT_IO UCSR0B, UDRIE0, r24
#endif /* UART0_SWFLOWCTRL */
99:
out _SFR_IO_ADDR(SREG), r18
out _SFR_IO_ADDR(SREG), r16
pop_range 16, 31
pop_range 0, 1
reti